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- From: abe@sci.utah.edu
- To: manta@sci.utah.edu
- Subject: [MANTA] r537 - branches/itanium2/histx
- Date: Fri, 9 Sep 2005 17:55:12 -0600 (MDT)
Author: abe
Date: Fri Sep 9 17:55:08 2005
New Revision: 537
Added:
branches/itanium2/histx/
branches/itanium2/histx/CMakeLists.txt
branches/itanium2/histx/Counter.h
branches/itanium2/histx/DerivedMonitor.cc
branches/itanium2/histx/DerivedMonitor.h
branches/itanium2/histx/IA64Monitors.cc
branches/itanium2/histx/IA64Monitors.h
branches/itanium2/histx/MmTimer.h
branches/itanium2/histx/SingleSamplerCounter.cc
branches/itanium2/histx/SingleSamplerCounter.h
Log:
Added a library to allow manta to statically (for the moment) interface with
the SGI ezpm library.
A histx/
A histx/Counter.h
A histx/DerivedMonitor.h
A histx/MmTimer.h
A histx/IA64Monitors.cc
A histx/IA64Monitors.h
A histx/SingleSamplerCounter.cc
A histx/SingleSamplerCounter.h
A histx/CMakeLists.txt
A histx/DerivedMonitor.cc
Added: branches/itanium2/histx/CMakeLists.txt
==============================================================================
--- (empty file)
+++ branches/itanium2/histx/CMakeLists.txt Fri Sep 9 17:55:08 2005
@@ -0,0 +1,35 @@
+
+SET(HISTX_PATH "/sw/sdev/histx_1.3b" CACHE STRING "Set this path to enable
IA64 Histx code.")
+IF(HISTX_PATH)
+
+ SET(HISTX_INCLUDE ${HISTX_PATH}/inc CACHE STRING "Path to include files")
+ SET(HISTX_LIB ${HISTX_PATH}/lib CACHE STRING "Path to libraries")
+ SET(HISTX_LINK ezpm histx)
+
+ INCLUDE_DIRECTORIES( ${HISTX_INCLUDE} )
+ LINK_DIRECTORIES( ${HISTX_LIB} )
+
+ ADD_LIBRARY(Manta_histx IA64Monitors.h
+ IA64Monitors.cc
+ Counter.h
+ DerivedMonitor.h
+ DerivedMonitor.cc
+
+ SingleSamplerCounter.h
+ SingleSamplerCounter.cc
+
+ # RaytracerCounter.h
+ # RaytracerCounter.cc
+
+ MmTimer.h )
+
+ TARGET_LINK_LIBRARIES(Manta_histx ${HISTX_LINK}
+ Manta_Engine
+ Manta_UserInterface
+ Manta_Model
+ Manta_Image
+ Manta_Interface
+ Manta_Core
+ SCIRun_Core)
+
+ENDIF(HISTX_PATH)
\ No newline at end of file
Added: branches/itanium2/histx/Counter.h
==============================================================================
--- (empty file)
+++ branches/itanium2/histx/Counter.h Fri Sep 9 17:55:08 2005
@@ -0,0 +1,20 @@
+#ifndef Manta_Histx_COUNTER__H
+#define Manta_Histx_COUNTER__H
+
+namespace Histx_Manta {
+
+
/////////////////////////////////////////////////////////////////////////////
+ // Interface for counters.
+ class Counter {
+
+ // Begin and end counting.
+ virtual void begin() = 0;
+ virtual void end() = 0;
+
+ // Return derived quantity.
+ virtual double eval() = 0;
+ };
+
+};
+
+#endif
Added: branches/itanium2/histx/DerivedMonitor.cc
==============================================================================
--- (empty file)
+++ branches/itanium2/histx/DerivedMonitor.cc Fri Sep 9 17:55:08 2005
@@ -0,0 +1,46 @@
+
+
+#include "DerivedMonitor.h"
+
+using namespace Histx_Manta;
+
+double test0( int n ) {
+
+ CpuCycles c0;
+ c0.begin();
+ int a = 0;
+ for (int i=0;i<n;++i) {
+ a *= a;
+ };
+ c0.end();
+ return c0.eval();
+};
+
+double test1( int n ) {
+
+ InstructionsPerCycle c0;
+ c0.begin();
+ int a = 0;
+ for (int i=0;i<n;++i) {
+ a *= a;
+ };
+ c0.end();
+ return c0.eval();
+};
+
+double test2( int n ) {
+
+ L1IMissRatio c0;
+ c0.begin();
+ int a = 0;
+ for (int i=0;i<n;++i) {
+ a *= a;
+ };
+ c0.end();
+
+
+ return c0.eval();
+};
+
+
+
Added: branches/itanium2/histx/DerivedMonitor.h
==============================================================================
--- (empty file)
+++ branches/itanium2/histx/DerivedMonitor.h Fri Sep 9 17:55:08 2005
@@ -0,0 +1,179 @@
+
+#ifndef Manta_Histx_DERIVEDMONITOR__H
+#define Manta_Histx_DERIVEDMONITOR__H
+
+#include <ezpm.h>
+
+#include <histx/IA64Monitors.h>
+#include <histx/Counter.h>
+
+#include <iostream>
+
+namespace Histx_Manta {
+
+
/////////////////////////////////////////////////////////////////////////////
+
/////////////////////////////////////////////////////////////////////////////
+ // Monitor assigns a ezpm counter id given a monitor type.
+ template< IA64_MONITOR monitor >
+ class Monitor {
+ protected:
+ static int const size = 1;
+ int lookup() {
+ // Lookup the monitor string and event id.
+ const char *str = getMonitorString( monitor );
+ int event_id = ezpm_lookup( str );
+
+ // Make sure the string was accepted.
+ if (event_id < 0) {
+ std::cout << "ezpm ERROR: Bad string: " <<
str << std::endl;
+ }
+
+ return event_id;
+ };
+ };
+
+
/////////////////////////////////////////////////////////////////////////////
+
/////////////////////////////////////////////////////////////////////////////
+ // Place holder for empty performance measures.
+ template< int index = 0 >
+ class Empty {
+ protected:
+ static int const size = 0;
+ int lookup() { return 0; };
+ };
+
+
/////////////////////////////////////////////////////////////////////////////
+
/////////////////////////////////////////////////////////////////////////////
+ // This class wraps the actual performance counter calls and contain
the
+ // event id's and count output buffer.
+ template< typename A,
+ typename B = Empty<1>, // Empty slots must have different
types.
+ typename C = Empty<2>,
+ typename D = Empty<3> >
+
+ class EzpmCounter : protected A,
+ protected B,
+
protected C,
+
protected D {
+ private:
+ static int const size = A::size + B::size + C::size + D::size;
+ int event_id[4];
+ unsigned long count[4];
+
+ public:
+ // Initialize, set events and finalize
+ void init() { if (ezpm_initialize() < 0)
+
std::cout << "ezpm_initialize ERROR" << std::endl;
+
event_id[0] = A::lookup();
+
event_id[1] = B::lookup();
+
event_id[2] = C::lookup();
+
event_id[3] = D::lookup();
+
+
if (ezpm_set_events( event_id, size ) < 0)
+
std::cout << "ezpm_initialize ERROR" << std::endl;
+ };
+
+ EzpmCounter() { init(); };
+ ~EzpmCounter() { ezpm_finalize(); };
+
+ // Begin and end counting.
+ void begin() { ezpm_begin(); };
+ void end() { ezpm_end( count ); };
+
+ // Access the counters.
+ unsigned long getCounter( int i ) { return count[i]; };
+ };
+
+ // Native monitors.
+ template< IA64_MONITOR A >
+ class Native : public EzpmCounter< Monitor< A > >, public Counter {
+ typedef EzpmCounter< Monitor< A > > ParentType;
+ public:
+ void begin() { ParentType::begin(); };
+ void end() { ParentType::end(); };
+ double eval() { return ParentType::getCounter(0); };
+ };
+
+ // Derived Monitors.
+ // A + B
+ template< IA64_MONITOR A, IA64_MONITOR B >
+ class Derived_Add {
+ public:
+ static IA64_MONITOR const AType = A;
+ static IA64_MONITOR const BType = B;
+ public:
+ double eval( double c0, double c1 ) { return c0 + c1;
}
+ };
+
+
+ // Derived Metrics:
+ // Ratio between two derived monitors.
+ // Primary template.
+ template< typename DERIVED_MONITOR_A, typename DERIVED_MONITOR_B >
+ class Metric_Derived_Div_Derived :
+ public EzpmCounter< Monitor< DERIVED_MONITOR_A::AType
>,
+
Monitor< DERIVED_MONITOR_A::BType >,
+ Monitor< DERIVED_MONITOR_B::AType >,
+ Monitor< DERIVED_MONITOR_B::BType > >,
+ public DERIVED_MONITOR_A,
+ public DERIVED_MONITOR_B,
+ public Counter {
+
+ protected:
+ typedef EzpmCounter< Monitor<
DERIVED_MONITOR_A::AType >,
+
Monitor< DERIVED_MONITOR_A::BType >,
+ Monitor<
DERIVED_MONITOR_B::AType >,
+ Monitor<
DERIVED_MONITOR_B::BType > > ParentType;
+ public:
+ void begin() { ParentType::begin(); };
+ void end() { ParentType::end(); };
+ double eval() { return DERIVED_MONITOR_A::eval(
ParentType::getCounter(0), ParentType::getCounter(1))/
+
DERIVED_MONITOR_B::eval(
ParentType::getCounter(2), ParentType::getCounter(3)); }
+ };
+
+ // Ratio between a native monitor and a derived monitor.
+ template< IA64_MONITOR A, typename DERIVED_MONITOR_B >
+ class Metric_Native_Div_Derived :
+ public DERIVED_MONITOR_B,
+ public EzpmCounter< Monitor< A >,
+ Monitor< DERIVED_MONITOR_B::AType >,
+
Monitor< DERIVED_MONITOR_B::BType > >,
+ public Counter {
+ protected:
+ typedef EzpmCounter< Monitor< A >,
+ Monitor< DERIVED_MONITOR_B::AType >,
+ Monitor< DERIVED_MONITOR_B::BType > >
ParentType;
+ public:
+ void begin() { ParentType::begin(); };
+ void end() { ParentType::end(); };
+ double eval() { return
ParentType::getCounter(0)/DERIVED_MONITOR_B::eval( ParentType::getCounter(1),
ParentType::getCounter(2)); }
+ };
+
+ // Ratio between two native monitors.
+ template< IA64_MONITOR A, IA64_MONITOR B >
+ class Metric_Native_Div_Native :
+ public EzpmCounter< Monitor< A >, Monitor< B > >, public
Counter {
+ typedef EzpmCounter< Monitor< A >, Monitor< B > > ParentType;
+ public:
+ void begin() { ParentType::begin(); };
+ void end() { ParentType::end(); };
+ double eval() { return
ParentType::getCounter(0)/ParentType::getCounter(1); }
+ };
+
+
/////////////////////////////////////////////////////////////////////////////
+
/////////////////////////////////////////////////////////////////////////////
+
/////////////////////////////////////////////////////////////////////////////
+
+ // Native monitors.
+ typedef Native< CPU_CYCLES > CpuCycles;
+ typedef Native< CPU_CPL_CHANGES > CpuCplChanges;
+
+ // Derived monitors.
+ // typedef Derived_Add< L1I_PREFETCH_READS, L1I_DEMAND_READS >
L1I_REFERENCES_d;
+
+ // Derived metrics.
+ typedef Metric_Native_Div_Native< IA64_INST_RETIRED_THIS, CPU_CYCLES
> InstructionsPerCycle;
+ typedef Metric_Native_Div_Native< L2_INST_DEMAND_READS, L1I_READS >
L1IMissRatio;
+};
+
+#endif
Added: branches/itanium2/histx/IA64Monitors.cc
==============================================================================
--- (empty file)
+++ branches/itanium2/histx/IA64Monitors.cc Fri Sep 9 17:55:08 2005
@@ -0,0 +1,450 @@
+#include "IA64Monitors.h"
+#include "DerivedMonitor.h"
+
+
+using namespace Histx_Manta;
+
+const char *IA64Monitor_Text[] = {
+ "ALAT_CAPACITY_MISS.ALL",
+ "ALAT_CAPACITY_MISS.FP",
+ "ALAT_CAPACITY_MISS.INT",
+ "BACK_END_BUBBLE.ALL",
+ "BACK_END_BUBBLE.FE",
+ "BACK_END_BUBBLE.L1D_FPU_RSE",
+ "BE_BR_MISPRED_DETAIL.ANY",
+ "BE_BR_MISPRED_DETAIL.PFS",
+ "BE_BR_MISPRED_DETAIL.ROT",
+ "BE_BR_MISPRED_DETAIL.STG",
+ "BE_EXE_BUBBLE.ALL",
+ "BE_EXE_BUBBLE.ARCR",
+ "BE_EXE_BUBBLE.ARCR_PR_CANCEL_BANK",
+ "BE_EXE_BUBBLE.BANK_SWITCH",
+ "BE_EXE_BUBBLE.CANCEL",
+ "BE_EXE_BUBBLE.FRALL",
+ "BE_EXE_BUBBLE.GRALL",
+ "BE_EXE_BUBBLE.GRGR",
+ "BE_EXE_BUBBLE.PR",
+ "BE_FLUSH_BUBBLE.ALL",
+ "BE_FLUSH_BUBBLE.BRU",
+ "BE_FLUSH_BUBBLE.XPN",
+ "BE_L1D_FPU_BUBBLE.ALL",
+ "BE_L1D_FPU_BUBBLE.FPU",
+ "BE_L1D_FPU_BUBBLE.L1D",
+ "BE_L1D_FPU_BUBBLE.L1D_DCS",
+ "BE_L1D_FPU_BUBBLE.L1D_DCURECIR",
+ "BE_L1D_FPU_BUBBLE.L1D_FILLCONF",
+ "BE_L1D_FPU_BUBBLE.L1D_FULLSTBUF",
+ "BE_L1D_FPU_BUBBLE.L1D_HPW",
+ "BE_L1D_FPU_BUBBLE.L1D_L2BPRESS",
+ "BE_L1D_FPU_BUBBLE.L1D_LDCHK",
+ "BE_L1D_FPU_BUBBLE.L1D_LDCONF",
+ "BE_L1D_FPU_BUBBLE.L1D_NAT",
+ "BE_L1D_FPU_BUBBLE.L1D_NATCONF",
+ "BE_L1D_FPU_BUBBLE.L1D_STBUFRECIR",
+ "BE_L1D_FPU_BUBBLE.L1D_TLB",
+ "BE_LOST_BW_DUE_TO_FE.ALL",
+ "BE_LOST_BW_DUE_TO_FE.BI",
+ "BE_LOST_BW_DUE_TO_FE.BRQ",
+ "BE_LOST_BW_DUE_TO_FE.BR_ILOCK",
+ "BE_LOST_BW_DUE_TO_FE.BUBBLE",
+ "BE_LOST_BW_DUE_TO_FE.FEFLUSH",
+ "BE_LOST_BW_DUE_TO_FE.FILL_RECIRC",
+ "BE_LOST_BW_DUE_TO_FE.IBFULL",
+ "BE_LOST_BW_DUE_TO_FE.IMISS",
+ "BE_LOST_BW_DUE_TO_FE.PLP",
+ "BE_LOST_BW_DUE_TO_FE.TLBMISS",
+ "BE_LOST_BW_DUE_TO_FE.UNREACHED",
+ "BE_RSE_BUBBLE.ALL",
+ "BE_RSE_BUBBLE.AR_DEP",
+ "BE_RSE_BUBBLE.BANK_SWITCH",
+ "BE_RSE_BUBBLE.LOADRS",
+ "BE_RSE_BUBBLE.OVERFLOW",
+ "BE_RSE_BUBBLE.UNDERFLOW",
+ "BR_MISPRED_DETAIL.ALL.ALL_PRED",
+ "BR_MISPRED_DETAIL.ALL.CORRECT_PRED",
+ "BR_MISPRED_DETAIL.ALL.WRONG_PATH",
+ "BR_MISPRED_DETAIL.ALL.WRONG_TARGET",
+ "BR_MISPRED_DETAIL.IPREL.ALL_PRED",
+ "BR_MISPRED_DETAIL.IPREL.CORRECT_PRED",
+ "BR_MISPRED_DETAIL.IPREL.WRONG_PATH",
+ "BR_MISPRED_DETAIL.IPREL.WRONG_TARGET",
+ "BR_MISPRED_DETAIL.NTRETIND.ALL_PRED",
+ "BR_MISPRED_DETAIL.NTRETIND.CORRECT_PRED",
+ "BR_MISPRED_DETAIL.NTRETIND.WRONG_PATH",
+ "BR_MISPRED_DETAIL.NTRETIND.WRONG_TARGET",
+ "BR_MISPRED_DETAIL.RETURN.ALL_PRED",
+ "BR_MISPRED_DETAIL.RETURN.CORRECT_PRED",
+ "BR_MISPRED_DETAIL.RETURN.WRONG_PATH",
+ "BR_MISPRED_DETAIL.RETURN.WRONG_TARGET",
+ "BR_MISPRED_DETAIL2.ALL.ALL_UNKNOWN_PRED",
+ "BR_MISPRED_DETAIL2.ALL.UNKNOWN_PATH_CORRECT_PRED",
+ "BR_MISPRED_DETAIL2.ALL.UNKNOWN_PATH_WRONG_PATH",
+ "BR_MISPRED_DETAIL2.IPREL.ALL_UNKNOWN_PRED",
+ "BR_MISPRED_DETAIL2.IPREL.UNKNOWN_PATH_CORRECT_PRED",
+ "BR_MISPRED_DETAIL2.IPREL.UNKNOWN_PATH_WRONG_PATH",
+ "BR_MISPRED_DETAIL2.NRETIND.ALL_UNKNOWN_PRED",
+
"BR_MISPRED_DETAIL2.NRETIND.UNKNOWN_PATH_CORRECT_PRED",
+ "BR_MISPRED_DETAIL2.NRETIND.UNKNOWN_PATH_WRONG_PATH",
+ "BR_MISPRED_DETAIL2.RETURN.ALL_UNKNOWN_PRED",
+ "BR_MISPRED_DETAIL2.RETURN.UNKNOWN_PATH_CORRECT_PRED",
+ "BR_MISPRED_DETAIL2.RETURN.UNKNOWN_PATH_WRONG_PATH",
+ "BR_PATH_PRED.ALL.MISPRED_NOTTAKEN",
+ "BR_PATH_PRED.ALL.MISPRED_TAKEN",
+ "BR_PATH_PRED.ALL.OKPRED_NOTTAKEN",
+ "BR_PATH_PRED.ALL.OKPRED_TAKEN",
+ "BR_PATH_PRED.IPREL.MISPRED_NOTTAKEN",
+ "BR_PATH_PRED.IPREL.MISPRED_TAKEN",
+ "BR_PATH_PRED.IPREL.OKPRED_NOTTAKEN",
+ "BR_PATH_PRED.IPREL.OKPRED_TAKEN",
+ "BR_PATH_PRED.NRETIND.MISPRED_NOTTAKEN",
+ "BR_PATH_PRED.NRETIND.MISPRED_TAKEN",
+ "BR_PATH_PRED.NRETIND.OKPRED_NOTTAKEN",
+ "BR_PATH_PRED.NRETIND.OKPRED_TAKEN",
+ "BR_PATH_PRED.RETURN.MISPRED_NOTTAKEN",
+ "BR_PATH_PRED.RETURN.MISPRED_TAKEN",
+ "BR_PATH_PRED.RETURN.OKPRED_NOTTAKEN",
+ "BR_PATH_PRED.RETURN.OKPRED_TAKEN",
+ "BR_PATH_PRED2.ALL.UNKNOWNPRED_NOTTAKEN",
+ "BR_PATH_PRED2.ALL.UNKNOWNPRED_TAKEN",
+ "BR_PATH_PRED2.IPREL.UNKNOWNPRED_NOTTAKEN",
+ "BR_PATH_PRED2.IPREL.UNKNOWNPRED_TAKEN",
+ "BR_PATH_PRED2.NRETIND.UNKNOWNPRED_NOTTAKEN",
+ "BR_PATH_PRED2.NRETIND.UNKNOWNPRED_TAKEN",
+ "BR_PATH_PRED2.RETURN.UNKNOWNPRED_NOTTAKEN",
+ "BR_PATH_PRED2.RETURN.UNKNOWNPRED_TAKEN",
+ "BUS_ALL.ANY",
+ "BUS_ALL.IO",
+ "BUS_ALL.SELF",
+ "BUS_BACKSNP_REQ.THIS",
+ "BUS_BRQ_LIVE_REQ_HI",
+ "BUS_BRQ_LIVE_REQ_LO",
+ "BUS_BRQ_REQ_INSERTED",
+ "BUS_DATA_CYCLE",
+ "BUS_HITM",
+ "BUS_IO.ANY",
+ "BUS_IO.IO",
+ "BUS_IO.SELF",
+ "BUS_IOQ_LIVE_REQ_HI",
+ "BUS_IOQ_LIVE_REQ_LO",
+ "BUS_LOCK.ANY",
+ "BUS_LOCK.SELF",
+ "BUS_MEMORY.ALL.ANY",
+ "BUS_MEMORY.ALL.IO",
+ "BUS_MEMORY.ALL.SELF",
+ "BUS_MEMORY.EQ_128BYTE.ANY",
+ "BUS_MEMORY.EQ_128BYTE.IO",
+ "BUS_MEMORY.EQ_128BYTE.SELF",
+ "BUS_MEMORY.LT_128BYTE.ANY",
+ "BUS_MEMORY.LT_128BYTE.IO",
+ "BUS_MEMORY.LT_128BYTE.SELF",
+ "BUS_MEM_READ.ALL.ANY",
+ "BUS_MEM_READ.ALL.IO",
+ "BUS_MEM_READ.ALL.SELF",
+ "BUS_MEM_READ.BIL.ANY",
+ "BUS_MEM_READ.BIL.IO",
+ "BUS_MEM_READ.BIL.SELF",
+ "BUS_MEM_READ.BRIL.ANY",
+ "BUS_MEM_READ.BRIL.IO",
+ "BUS_MEM_READ.BRIL.SELF",
+ "BUS_MEM_READ.BRL.ANY",
+ "BUS_MEM_READ.BRL.IO",
+ "BUS_MEM_READ.BRL.SELF",
+ "BUS_MEM_READ_OUT_HI",
+ "BUS_MEM_READ_OUT_LO",
+ "BUS_OOQ_LIVE_REQ_HI",
+ "BUS_OOQ_LIVE_REQ_LO",
+ "BUS_RD_DATA.ANY",
+ "BUS_RD_DATA.IO",
+ "BUS_RD_DATA.SELF",
+ "BUS_RD_HIT",
+ "BUS_RD_HITM",
+ "BUS_RD_INVAL_ALL_HITM",
+ "BUS_RD_INVAL_HITM",
+ "BUS_RD_IO.ANY",
+ "BUS_RD_IO.IO",
+ "BUS_RD_IO.SELF",
+ "BUS_RD_PRTL.ANY",
+ "BUS_RD_PRTL.IO",
+ "BUS_RD_PRTL.SELF",
+ "BUS_SNOOPQ_REQ",
+ "BUS_SNOOPS.ANY",
+ "BUS_SNOOPS.IO",
+ "BUS_SNOOPS.SELF",
+ "BUS_SNOOPS_HITM.ANY",
+ "BUS_SNOOPS_HITM.SELF",
+ "BUS_SNOOP_STALL_CYCLES.ANY",
+ "BUS_SNOOP_STALL_CYCLES.SELF",
+ "BUS_WR_WB.ALL.ANY",
+ "BUS_WR_WB.ALL.IO",
+ "BUS_WR_WB.ALL.SELF",
+ "BUS_WR_WB.CCASTOUT.ANY",
+ "BUS_WR_WB.CCASTOUT.SELF",
+ "BUS_WR_WB.EQ_128BYTE.ANY",
+ "BUS_WR_WB.EQ_128BYTE.IO",
+ "BUS_WR_WB.EQ_128BYTE.SELF",
+ "CPU_CPL_CHANGES",
+ "CPU_CYCLES",
+ "DATA_DEBUG_REGISTER_FAULT",
+ "DATA_DEBUG_REGISTER_MATCHES",
+ "DATA_EAR_EVENTS",
+ "DATA_REFERENCES_SET0",
+ "DATA_REFERENCES_SET1",
+ "DISP_STALLED",
+ "DTLB_INSERTS_HPW",
+ "DTLB_INSERTS_HPW_RETIRED",
+ "ENCBR_MISPRED_DETAIL.ALL.ALL_PRED",
+ "ENCBR_MISPRED_DETAIL.ALL.CORRECT_PRED",
+ "ENCBR_MISPRED_DETAIL.ALL.WRONG_PATH",
+ "ENCBR_MISPRED_DETAIL.ALL.WRONG_TARGET",
+ "ENCBR_MISPRED_DETAIL.ALL2.CORRECT_PRED",
+ "ENCBR_MISPRED_DETAIL.ALL2.WRONG_PATH",
+ "ENCBR_MISPRED_DETAIL.ALL2.WRONG_TARGET",
+ "ENCBR_MISPRED_DETAIL.ALL2_ALL_PRED",
+ "ENCBR_MISPRED_DETAIL.OVERSUB.ALL_PRED",
+ "ENCBR_MISPRED_DETAIL.OVERSUB.CORRECT_PRED",
+ "ENCBR_MISPRED_DETAIL.OVERSUB.WRONG_PATH",
+ "ENCBR_MISPRED_DETAIL.OVERSUB.WRONG_TARGET",
+ "EXTERN_DP_PINS_0_TO_3.PIN0",
+ "EXTERN_DP_PINS_0_TO_3.PIN1",
+ "EXTERN_DP_PINS_0_TO_3.PIN2",
+ "EXTERN_DP_PINS_0_TO_3.PIN3",
+ "EXTERN_DP_PINS_4_TO_5.PIN4",
+ "EXTERN_DP_PINS_4_TO_5.PIN5",
+ "FE_BUBBLE.ALL",
+ "FE_BUBBLE.ALLBUT_FEFLUSH_BUBBLE",
+ "FE_BUBBLE.ALLBUT_IBFULL",
+ "FE_BUBBLE.BRANCH",
+ "FE_BUBBLE.BUBBLE",
+ "FE_BUBBLE.FEFLUSH",
+ "FE_BUBBLE.FILL_RECIRC",
+ "FE_BUBBLE.GROUP1",
+ "FE_BUBBLE.GROUP2",
+ "FE_BUBBLE.GROUP3",
+ "FE_BUBBLE.IBFULL",
+ "FE_BUBBLE.IMISS",
+ "FE_BUBBLE.TLBMISS",
+ "FE_LOST_BW.ALL",
+ "FE_LOST_BW.BI",
+ "FE_LOST_BW.BRQ",
+ "FE_LOST_BW.BR_ILOCK",
+ "FE_LOST_BW.BUBBLE",
+ "FE_LOST_BW.FEFLUSH",
+ "FE_LOST_BW.FILL_RECIRC",
+ "FE_LOST_BW.IBFULL",
+ "FE_LOST_BW.IMISS",
+ "FE_LOST_BW.PLP",
+ "FE_LOST_BW.TLBMISS",
+ "FE_LOST_BW.UNREACHED",
+ "FP_FAILED_FCHKF",
+ "FP_FALSE_SIRSTALL",
+ "FP_FLUSH_TO_ZERO",
+ "FP_OPS_RETIRED",
+ "FP_TRUE_SIRSTALL",
+ "HPW_DATA_REFERENCES",
+ "IA32_INST_RETIRED",
+ "IA32_ISA_TRANSITIONS",
+ "IA64_INST_RETIRED.THIS",
+ "IA64_TAGGED_INST_RETIRED.IBRP0_PMC8",
+ "IA64_TAGGED_INST_RETIRED.IBRP1_PMC9",
+ "IA64_TAGGED_INST_RETIRED.IBRP2_PMC8",
+ "IA64_TAGGED_INST_RETIRED.IBRP3_PMC9",
+ "IDEAL_BE_LOST_BW_DUE_TO_FE.ALL",
+ "IDEAL_BE_LOST_BW_DUE_TO_FE.BI",
+ "IDEAL_BE_LOST_BW_DUE_TO_FE.BRQ",
+ "IDEAL_BE_LOST_BW_DUE_TO_FE.BR_ILOCK",
+ "IDEAL_BE_LOST_BW_DUE_TO_FE.BUBBLE",
+ "IDEAL_BE_LOST_BW_DUE_TO_FE.FEFLUSH",
+ "IDEAL_BE_LOST_BW_DUE_TO_FE.FILL_RECIRC",
+ "IDEAL_BE_LOST_BW_DUE_TO_FE.IBFULL",
+ "IDEAL_BE_LOST_BW_DUE_TO_FE.IMISS",
+ "IDEAL_BE_LOST_BW_DUE_TO_FE.PLP",
+ "IDEAL_BE_LOST_BW_DUE_TO_FE.TLBMISS",
+ "IDEAL_BE_LOST_BW_DUE_TO_FE.UNREACHED",
+ "INST_CHKA_LDC_ALAT.ALL",
+ "INST_CHKA_LDC_ALAT.FP",
+ "INST_CHKA_LDC_ALAT.INT",
+ "INST_DISPERSED",
+ "INST_FAILED_CHKA_LDC_ALAT.ALL",
+ "INST_FAILED_CHKA_LDC_ALAT.FP",
+ "INST_FAILED_CHKA_LDC_ALAT.INT",
+ "INST_FAILED_CHKS_RETIRED.ALL",
+ "INST_FAILED_CHKS_RETIRED.FP",
+ "INST_FAILED_CHKS_RETIRED.INT",
+ "ISB_BUNPAIRS_IN",
+ "ITLB_MISSES_FETCH.ALL",
+ "ITLB_MISSES_FETCH.L1ITLB",
+ "ITLB_MISSES_FETCH.L2ITLB",
+ "L1DTLB_TRANSFER",
+ "L1D_READS_SET0",
+ "L1D_READS_SET1",
+ "L1D_READ_MISSES.ALL",
+ "L1D_READ_MISSES.RSE_FILL",
+ "L1ITLB_INSERTS_HPW",
+ "L1I_EAR_EVENTS",
+ "L1I_FETCH_ISB_HIT",
+ "L1I_FETCH_RAB_HIT",
+ "L1I_FILLS",
+ "L1I_PREFETCHES",
+ "L1I_PREFETCH_STALL.ALL",
+ "L1I_PREFETCH_STALL.FLOW",
+ "L1I_PURGE",
+ "L1I_PVAB_OVERFLOW",
+ "L1I_RAB_ALMOST_FULL",
+ "L1I_RAB_FULL",
+ "L1I_READS",
+ "L1I_SNOOP",
+ "L1I_STRM_PREFETCHES",
+ "L2DTLB_MISSES",
+ "L2_BAD_LINES_SELECTED.ANY",
+ "L2_BYPASS.L2_DATA1",
+ "L2_BYPASS.L2_DATA2",
+ "L2_BYPASS.L2_INST1",
+ "L2_BYPASS.L2_INST2",
+ "L2_BYPASS.L3_DATA1",
+ "L2_BYPASS.L3_INST1",
+ "L2_DATA_REFERENCES.L2_ALL",
+ "L2_DATA_REFERENCES.L2_DATA_READS",
+ "L2_DATA_REFERENCES.L2_DATA_WRITES",
+ "L2_FILLB_FULL.THIS",
+ "L2_FORCE_RECIRC.ANY",
+ "L2_FORCE_RECIRC.FILL_HIT",
+ "L2_FORCE_RECIRC.FRC_RECIRC",
+ "L2_FORCE_RECIRC.IPF_MISS",
+ "L2_FORCE_RECIRC.L1W",
+ "L2_FORCE_RECIRC.OZQ_MISS",
+ "L2_FORCE_RECIRC.SAME_INDEX",
+ "L2_FORCE_RECIRC.SMC_HIT",
+ "L2_FORCE_RECIRC.SNP_OR_L3",
+ "L2_FORCE_RECIRC.TAG_NOTOK",
+ "L2_FORCE_RECIRC.TRAN_PREF",
+ "L2_FORCE_RECIRC.VIC_BUF_FULL",
+ "L2_FORCE_RECIRC.VIC_PEND",
+ "L2_GOT_RECIRC_IFETCH.ANY",
+ "L2_GOT_RECIRC_OZQ_ACC",
+ "L2_IFET_CANCELS.ANY",
+ "L2_IFET_CANCELS.BYPASS",
+ "L2_IFET_CANCELS.CHG_PRIO",
+ "L2_IFET_CANCELS.DATA_RD",
+ "L2_IFET_CANCELS.DIDNT_RECIR",
+ "L2_IFET_CANCELS.IFETCH_BYP",
+ "L2_IFET_CANCELS.PREEMPT",
+ "L2_IFET_CANCELS.RECIR_OVER_SUB",
+ "L2_IFET_CANCELS.ST_FILL_WB",
+ "L2_INST_DEMAND_READS",
+ "L2_INST_PREFETCHES",
+ "L2_ISSUED_RECIRC_IFETCH.ANY",
+ "L2_ISSUED_RECIRC_OZQ_ACC",
+ "L2_L3ACCESS_CANCEL.ANY",
+ "L2_L3ACCESS_CANCEL.DFETCH",
+ "L2_L3ACCESS_CANCEL.EBL_REJECT",
+ "L2_L3ACCESS_CANCEL.FILLD_FULL",
+ "L2_L3ACCESS_CANCEL.IFETCH",
+ "L2_L3ACCESS_CANCEL.INV_L3_BYP",
+ "L2_L3ACCESS_CANCEL.SPEC_L3_BYP",
+ "L2_L3ACCESS_CANCEL.UC_BLOCKED",
+ "L2_MISSES",
+ "L2_OPS_ISSUED.FP_LOAD",
+ "L2_OPS_ISSUED.INT_LOAD",
+ "L2_OPS_ISSUED.NST_NLD",
+ "L2_OPS_ISSUED.RMW",
+ "L2_OPS_ISSUED.STORE",
+ "L2_OZDB_FULL.THIS",
+ "L2_OZQ_ACQUIRE",
+ "L2_OZQ_CANCELS0.ANY",
+ "L2_OZQ_CANCELS0.LATE_ACQUIRE",
+ "L2_OZQ_CANCELS0.LATE_BYP_EFFRELEASE",
+ "L2_OZQ_CANCELS0.LATE_RELEASE",
+ "L2_OZQ_CANCELS0.LATE_SPEC_BYP",
+ "L2_OZQ_CANCELS1.BANK_CONF",
+ "L2_OZQ_CANCELS1.CANC_L2M_ST",
+ "L2_OZQ_CANCELS1.CCV",
+ "L2_OZQ_CANCELS1.ECC",
+ "L2_OZQ_CANCELS1.HPW_IFETCH_CONF",
+ "L2_OZQ_CANCELS1.L1DF_L2M",
+ "L2_OZQ_CANCELS1.L1_FILL_CONF",
+ "L2_OZQ_CANCELS1.L2A_ST_MAT",
+ "L2_OZQ_CANCELS1.L2D_ST_MAT",
+ "L2_OZQ_CANCELS1.L2M_ST_MAT",
+ "L2_OZQ_CANCELS1.MFA",
+ "L2_OZQ_CANCELS1.REL",
+ "L2_OZQ_CANCELS1.SEM",
+ "L2_OZQ_CANCELS1.ST_FILL_CONF",
+ "L2_OZQ_CANCELS1.SYNC",
+ "L2_OZQ_CANCELS2.ACQ",
+ "L2_OZQ_CANCELS2.CANC_L2C_ST",
+ "L2_OZQ_CANCELS2.CANC_L2D_ST",
+ "L2_OZQ_CANCELS2.DIDNT_RECIRC",
+ "L2_OZQ_CANCELS2.D_IFET",
+ "L2_OZQ_CANCELS2.L2C_ST_MAT",
+ "L2_OZQ_CANCELS2.L2FILL_ST_CONF",
+ "L2_OZQ_CANCELS2.OVER_SUB",
+ "L2_OZQ_CANCELS2.OZ_DATA_CONF",
+ "L2_OZQ_CANCELS2.READ_WB_CONF",
+ "L2_OZQ_CANCELS2.RECIRC_OVER_SUB",
+ "L2_OZQ_CANCELS2.SCRUB",
+ "L2_OZQ_CANCELS2.WEIRD",
+ "L2_OZQ_FULL.THIS",
+ "L2_OZQ_RELEASE",
+ "L2_REFERENCES",
+ "L2_STORE_HIT_SHARED.ANY",
+ "L2_SYNTH_PROBE",
+ "L2_VICTIMB_FULL.THIS",
+ "L3_LINES_REPLACED",
+ "L3_MISSES",
+ "L3_READS.ALL.ALL",
+ "L3_READS.ALL.HIT",
+ "L3_READS.ALL.MISS",
+ "L3_READS.DATA_READ.ALL",
+ "L3_READS.DATA_READ.HIT",
+ "L3_READS.DATA_READ.MISS",
+ "L3_READS.DINST_FETCH.ALL",
+ "L3_READS.DINST_FETCH.HIT",
+ "L3_READS.DINST_FETCH.MISS",
+ "L3_READS.INST_FETCH.ALL",
+ "L3_READS.INST_FETCH.HIT",
+ "L3_READS.INST_FETCH.MISS",
+ "L3_REFERENCES",
+ "L3_WRITES.ALL.ALL",
+ "L3_WRITES.ALL.HIT",
+ "L3_WRITES.ALL.MISS",
+ "L3_WRITES.DATA_WRITE.ALL",
+ "L3_WRITES.DATA_WRITE.HIT",
+ "L3_WRITES.DATA_WRITE.MISS",
+ "L3_WRITES.L2_WB.ALL",
+ "L3_WRITES.L2_WB.HIT",
+ "L3_WRITES.L2_WB.MISS",
+ "LOADS_RETIRED",
+ "MEM_READ_CURRENT.ANY",
+ "MEM_READ_CURRENT.IO",
+ "MISALIGNED_LOADS_RETIRED",
+ "MISALIGNED_STORES_RETIRED",
+ "NOPS_RETIRED",
+ "PREDICATE_SQUASHED_RETIRED",
+ "RSE_CURRENT_REGS_2_TO_0",
+ "RSE_CURRENT_REGS_5_TO_3",
+ "RSE_CURRENT_REGS_6",
+ "RSE_DIRTY_REGS_2_TO_0",
+ "RSE_DIRTY_REGS_5_TO_3",
+ "RSE_DIRTY_REGS_6",
+ "RSE_EVENT_RETIRED",
+ "RSE_REFERENCES_RETIRED.ALL",
+ "RSE_REFERENCES_RETIRED.LOAD",
+ "RSE_REFERENCES_RETIRED.STORE",
+ "SERIALIZATION_EVENTS",
+ "STORES_RETIRED",
+ "SYLL_NOT_DISPERSED.ALL",
+ "SYLL_NOT_DISPERSED.EXPL",
+ "SYLL_NOT_DISPERSED.FE",
+ "SYLL_NOT_DISPERSED.IMPL",
+ "SYLL_NOT_DISPERSED.MLI",
+ "SYLL_OVERCOUNT.ALL",
+ "SYLL_OVERCOUNT.EXPL",
+ "SYLL_OVERCOUNT.IMPL",
+ "UC_LOADS_RETIRED",
+ "UC_STORES_RETIRED"
+};
+
+// Access monitor string.
+const char *Histx_Manta::getMonitorString( Histx_Manta::IA64_MONITOR monitor
) {
+ return IA64Monitor_Text[ (int)monitor ];
+}
Added: branches/itanium2/histx/IA64Monitors.h
==============================================================================
--- (empty file)
+++ branches/itanium2/histx/IA64Monitors.h Fri Sep 9 17:55:08 2005
@@ -0,0 +1,456 @@
+
+
+#ifndef Manta_Histx_IA64MONITORS__H
+#define Manta_Histx_IA64MONITORS__H
+
+namespace Histx_Manta {
+
+ // Enumeration of Monitor types_
+ // See lipfpm -l
+ enum IA64_MONITOR {
+ ALAT_CAPACITY_MISS_ALL,
+ ALAT_CAPACITY_MISS_FP,
+ ALAT_CAPACITY_MISS_INT,
+ BACK_END_BUBBLE_ALL,
+ BACK_END_BUBBLE_FE,
+ BACK_END_BUBBLE_L1D_FPU_RSE,
+ BE_BR_MISPRED_DETAIL_ANY,
+ BE_BR_MISPRED_DETAIL_PFS,
+ BE_BR_MISPRED_DETAIL_ROT,
+ BE_BR_MISPRED_DETAIL_STG,
+ BE_EXE_BUBBLE_ALL,
+ BE_EXE_BUBBLE_ARCR,
+ BE_EXE_BUBBLE_ARCR_PR_CANCEL_BANK,
+ BE_EXE_BUBBLE_BANK_SWITCH,
+ BE_EXE_BUBBLE_CANCEL,
+ BE_EXE_BUBBLE_FRALL,
+ BE_EXE_BUBBLE_GRALL,
+ BE_EXE_BUBBLE_GRGR,
+ BE_EXE_BUBBLE_PR,
+ BE_FLUSH_BUBBLE_ALL,
+ BE_FLUSH_BUBBLE_BRU,
+ BE_FLUSH_BUBBLE_XPN,
+ BE_L1D_FPU_BUBBLE_ALL,
+ BE_L1D_FPU_BUBBLE_FPU,
+ BE_L1D_FPU_BUBBLE_L1D,
+ BE_L1D_FPU_BUBBLE_L1D_DCS,
+ BE_L1D_FPU_BUBBLE_L1D_DCURECIR,
+ BE_L1D_FPU_BUBBLE_L1D_FILLCONF,
+ BE_L1D_FPU_BUBBLE_L1D_FULLSTBUF,
+ BE_L1D_FPU_BUBBLE_L1D_HPW,
+ BE_L1D_FPU_BUBBLE_L1D_L2BPRESS,
+ BE_L1D_FPU_BUBBLE_L1D_LDCHK,
+ BE_L1D_FPU_BUBBLE_L1D_LDCONF,
+ BE_L1D_FPU_BUBBLE_L1D_NAT,
+ BE_L1D_FPU_BUBBLE_L1D_NATCONF,
+ BE_L1D_FPU_BUBBLE_L1D_STBUFRECIR,
+ BE_L1D_FPU_BUBBLE_L1D_TLB,
+ BE_LOST_BW_DUE_TO_FE_ALL,
+ BE_LOST_BW_DUE_TO_FE_BI,
+ BE_LOST_BW_DUE_TO_FE_BRQ,
+ BE_LOST_BW_DUE_TO_FE_BR_ILOCK,
+ BE_LOST_BW_DUE_TO_FE_BUBBLE,
+ BE_LOST_BW_DUE_TO_FE_FEFLUSH,
+ BE_LOST_BW_DUE_TO_FE_FILL_RECIRC,
+ BE_LOST_BW_DUE_TO_FE_IBFULL,
+ BE_LOST_BW_DUE_TO_FE_IMISS,
+ BE_LOST_BW_DUE_TO_FE_PLP,
+ BE_LOST_BW_DUE_TO_FE_TLBMISS,
+ BE_LOST_BW_DUE_TO_FE_UNREACHED,
+ BE_RSE_BUBBLE_ALL,
+ BE_RSE_BUBBLE_AR_DEP,
+ BE_RSE_BUBBLE_BANK_SWITCH,
+ BE_RSE_BUBBLE_LOADRS,
+ BE_RSE_BUBBLE_OVERFLOW,
+ BE_RSE_BUBBLE_UNDERFLOW,
+ BR_MISPRED_DETAIL_ALL_ALL_PRED,
+ BR_MISPRED_DETAIL_ALL_CORRECT_PRED,
+ BR_MISPRED_DETAIL_ALL_WRONG_PATH,
+ BR_MISPRED_DETAIL_ALL_WRONG_TARGET,
+ BR_MISPRED_DETAIL_IPREL_ALL_PRED,
+ BR_MISPRED_DETAIL_IPREL_CORRECT_PRED,
+ BR_MISPRED_DETAIL_IPREL_WRONG_PATH,
+ BR_MISPRED_DETAIL_IPREL_WRONG_TARGET,
+ BR_MISPRED_DETAIL_NTRETIND_ALL_PRED,
+ BR_MISPRED_DETAIL_NTRETIND_CORRECT_PRED,
+ BR_MISPRED_DETAIL_NTRETIND_WRONG_PATH,
+ BR_MISPRED_DETAIL_NTRETIND_WRONG_TARGET,
+ BR_MISPRED_DETAIL_RETURN_ALL_PRED,
+ BR_MISPRED_DETAIL_RETURN_CORRECT_PRED,
+ BR_MISPRED_DETAIL_RETURN_WRONG_PATH,
+ BR_MISPRED_DETAIL_RETURN_WRONG_TARGET,
+ BR_MISPRED_DETAIL2_ALL_ALL_UNKNOWN_PRED,
+ BR_MISPRED_DETAIL2_ALL_UNKNOWN_PATH_CORRECT_PRED,
+ BR_MISPRED_DETAIL2_ALL_UNKNOWN_PATH_WRONG_PATH,
+ BR_MISPRED_DETAIL2_IPREL_ALL_UNKNOWN_PRED,
+ BR_MISPRED_DETAIL2_IPREL_UNKNOWN_PATH_CORRECT_PRED,
+ BR_MISPRED_DETAIL2_IPREL_UNKNOWN_PATH_WRONG_PATH,
+ BR_MISPRED_DETAIL2_NRETIND_ALL_UNKNOWN_PRED,
+ BR_MISPRED_DETAIL2_NRETIND_UNKNOWN_PATH_CORRECT_PRED,
+ BR_MISPRED_DETAIL2_NRETIND_UNKNOWN_PATH_WRONG_PATH,
+ BR_MISPRED_DETAIL2_RETURN_ALL_UNKNOWN_PRED,
+ BR_MISPRED_DETAIL2_RETURN_UNKNOWN_PATH_CORRECT_PRED,
+ BR_MISPRED_DETAIL2_RETURN_UNKNOWN_PATH_WRONG_PATH,
+ BR_PATH_PRED_ALL_MISPRED_NOTTAKEN,
+ BR_PATH_PRED_ALL_MISPRED_TAKEN,
+ BR_PATH_PRED_ALL_OKPRED_NOTTAKEN,
+ BR_PATH_PRED_ALL_OKPRED_TAKEN,
+ BR_PATH_PRED_IPREL_MISPRED_NOTTAKEN,
+ BR_PATH_PRED_IPREL_MISPRED_TAKEN,
+ BR_PATH_PRED_IPREL_OKPRED_NOTTAKEN,
+ BR_PATH_PRED_IPREL_OKPRED_TAKEN,
+ BR_PATH_PRED_NRETIND_MISPRED_NOTTAKEN,
+ BR_PATH_PRED_NRETIND_MISPRED_TAKEN,
+ BR_PATH_PRED_NRETIND_OKPRED_NOTTAKEN,
+ BR_PATH_PRED_NRETIND_OKPRED_TAKEN,
+ BR_PATH_PRED_RETURN_MISPRED_NOTTAKEN,
+ BR_PATH_PRED_RETURN_MISPRED_TAKEN,
+ BR_PATH_PRED_RETURN_OKPRED_NOTTAKEN,
+ BR_PATH_PRED_RETURN_OKPRED_TAKEN,
+ BR_PATH_PRED2_ALL_UNKNOWNPRED_NOTTAKEN,
+ BR_PATH_PRED2_ALL_UNKNOWNPRED_TAKEN,
+ BR_PATH_PRED2_IPREL_UNKNOWNPRED_NOTTAKEN,
+ BR_PATH_PRED2_IPREL_UNKNOWNPRED_TAKEN,
+ BR_PATH_PRED2_NRETIND_UNKNOWNPRED_NOTTAKEN,
+ BR_PATH_PRED2_NRETIND_UNKNOWNPRED_TAKEN,
+ BR_PATH_PRED2_RETURN_UNKNOWNPRED_NOTTAKEN,
+ BR_PATH_PRED2_RETURN_UNKNOWNPRED_TAKEN,
+ BUS_ALL_ANY,
+ BUS_ALL_IO,
+ BUS_ALL_SELF,
+ BUS_BACKSNP_REQ_THIS,
+ BUS_BRQ_LIVE_REQ_HI,
+ BUS_BRQ_LIVE_REQ_LO,
+ BUS_BRQ_REQ_INSERTED,
+ BUS_DATA_CYCLE,
+ BUS_HITM,
+ BUS_IO_ANY,
+ BUS_IO_IO,
+ BUS_IO_SELF,
+ BUS_IOQ_LIVE_REQ_HI,
+ BUS_IOQ_LIVE_REQ_LO,
+ BUS_LOCK_ANY,
+ BUS_LOCK_SELF,
+ BUS_MEMORY_ALL_ANY,
+ BUS_MEMORY_ALL_IO,
+ BUS_MEMORY_ALL_SELF,
+ BUS_MEMORY_EQ_128BYTE_ANY,
+ BUS_MEMORY_EQ_128BYTE_IO,
+ BUS_MEMORY_EQ_128BYTE_SELF,
+ BUS_MEMORY_LT_128BYTE_ANY,
+ BUS_MEMORY_LT_128BYTE_IO,
+ BUS_MEMORY_LT_128BYTE_SELF,
+ BUS_MEM_READ_ALL_ANY,
+ BUS_MEM_READ_ALL_IO,
+ BUS_MEM_READ_ALL_SELF,
+ BUS_MEM_READ_BIL_ANY,
+ BUS_MEM_READ_BIL_IO,
+ BUS_MEM_READ_BIL_SELF,
+ BUS_MEM_READ_BRIL_ANY,
+ BUS_MEM_READ_BRIL_IO,
+ BUS_MEM_READ_BRIL_SELF,
+ BUS_MEM_READ_BRL_ANY,
+ BUS_MEM_READ_BRL_IO,
+ BUS_MEM_READ_BRL_SELF,
+ BUS_MEM_READ_OUT_HI,
+ BUS_MEM_READ_OUT_LO,
+ BUS_OOQ_LIVE_REQ_HI,
+ BUS_OOQ_LIVE_REQ_LO,
+ BUS_RD_DATA_ANY,
+ BUS_RD_DATA_IO,
+ BUS_RD_DATA_SELF,
+ BUS_RD_HIT,
+ BUS_RD_HITM,
+ BUS_RD_INVAL_ALL_HITM,
+ BUS_RD_INVAL_HITM,
+ BUS_RD_IO_ANY,
+ BUS_RD_IO_IO,
+ BUS_RD_IO_SELF,
+ BUS_RD_PRTL_ANY,
+ BUS_RD_PRTL_IO,
+ BUS_RD_PRTL_SELF,
+ BUS_SNOOPQ_REQ,
+ BUS_SNOOPS_ANY,
+ BUS_SNOOPS_IO,
+ BUS_SNOOPS_SELF,
+ BUS_SNOOPS_HITM_ANY,
+ BUS_SNOOPS_HITM_SELF,
+ BUS_SNOOP_STALL_CYCLES_ANY,
+ BUS_SNOOP_STALL_CYCLES_SELF,
+ BUS_WR_WB_ALL_ANY,
+ BUS_WR_WB_ALL_IO,
+ BUS_WR_WB_ALL_SELF,
+ BUS_WR_WB_CCASTOUT_ANY,
+ BUS_WR_WB_CCASTOUT_SELF,
+ BUS_WR_WB_EQ_128BYTE_ANY,
+ BUS_WR_WB_EQ_128BYTE_IO,
+ BUS_WR_WB_EQ_128BYTE_SELF,
+ CPU_CPL_CHANGES,
+ CPU_CYCLES,
+ DATA_DEBUG_REGISTER_FAULT,
+ DATA_DEBUG_REGISTER_MATCHES,
+ DATA_EAR_EVENTS,
+ DATA_REFERENCES_SET0,
+ DATA_REFERENCES_SET1,
+ DISP_STALLED,
+ DTLB_INSERTS_HPW,
+ DTLB_INSERTS_HPW_RETIRED,
+ ENCBR_MISPRED_DETAIL_ALL_ALL_PRED,
+ ENCBR_MISPRED_DETAIL_ALL_CORRECT_PRED,
+ ENCBR_MISPRED_DETAIL_ALL_WRONG_PATH,
+ ENCBR_MISPRED_DETAIL_ALL_WRONG_TARGET,
+ ENCBR_MISPRED_DETAIL_ALL2_CORRECT_PRED,
+ ENCBR_MISPRED_DETAIL_ALL2_WRONG_PATH,
+ ENCBR_MISPRED_DETAIL_ALL2_WRONG_TARGET,
+ ENCBR_MISPRED_DETAIL_ALL2_ALL_PRED,
+ ENCBR_MISPRED_DETAIL_OVERSUB_ALL_PRED,
+ ENCBR_MISPRED_DETAIL_OVERSUB_CORRECT_PRED,
+ ENCBR_MISPRED_DETAIL_OVERSUB_WRONG_PATH,
+ ENCBR_MISPRED_DETAIL_OVERSUB_WRONG_TARGET,
+ EXTERN_DP_PINS_0_TO_3_PIN0,
+ EXTERN_DP_PINS_0_TO_3_PIN1,
+ EXTERN_DP_PINS_0_TO_3_PIN2,
+ EXTERN_DP_PINS_0_TO_3_PIN3,
+ EXTERN_DP_PINS_4_TO_5_PIN4,
+ EXTERN_DP_PINS_4_TO_5_PIN5,
+ FE_BUBBLE_ALL,
+ FE_BUBBLE_ALLBUT_FEFLUSH_BUBBLE,
+ FE_BUBBLE_ALLBUT_IBFULL,
+ FE_BUBBLE_BRANCH,
+ FE_BUBBLE_BUBBLE,
+ FE_BUBBLE_FEFLUSH,
+ FE_BUBBLE_FILL_RECIRC,
+ FE_BUBBLE_GROUP1,
+ FE_BUBBLE_GROUP2,
+ FE_BUBBLE_GROUP3,
+ FE_BUBBLE_IBFULL,
+ FE_BUBBLE_IMISS,
+ FE_BUBBLE_TLBMISS,
+ FE_LOST_BW_ALL,
+ FE_LOST_BW_BI,
+ FE_LOST_BW_BRQ,
+ FE_LOST_BW_BR_ILOCK,
+ FE_LOST_BW_BUBBLE,
+ FE_LOST_BW_FEFLUSH,
+ FE_LOST_BW_FILL_RECIRC,
+ FE_LOST_BW_IBFULL,
+ FE_LOST_BW_IMISS,
+ FE_LOST_BW_PLP,
+ FE_LOST_BW_TLBMISS,
+ FE_LOST_BW_UNREACHED,
+ FP_FAILED_FCHKF,
+ FP_FALSE_SIRSTALL,
+ FP_FLUSH_TO_ZERO,
+ FP_OPS_RETIRED,
+ FP_TRUE_SIRSTALL,
+ HPW_DATA_REFERENCES,
+ IA32_INST_RETIRED,
+ IA32_ISA_TRANSITIONS,
+ IA64_INST_RETIRED_THIS,
+ IA64_TAGGED_INST_RETIRED_IBRP0_PMC8,
+ IA64_TAGGED_INST_RETIRED_IBRP1_PMC9,
+ IA64_TAGGED_INST_RETIRED_IBRP2_PMC8,
+ IA64_TAGGED_INST_RETIRED_IBRP3_PMC9,
+ IDEAL_BE_LOST_BW_DUE_TO_FE_ALL,
+ IDEAL_BE_LOST_BW_DUE_TO_FE_BI,
+ IDEAL_BE_LOST_BW_DUE_TO_FE_BRQ,
+ IDEAL_BE_LOST_BW_DUE_TO_FE_BR_ILOCK,
+ IDEAL_BE_LOST_BW_DUE_TO_FE_BUBBLE,
+ IDEAL_BE_LOST_BW_DUE_TO_FE_FEFLUSH,
+ IDEAL_BE_LOST_BW_DUE_TO_FE_FILL_RECIRC,
+ IDEAL_BE_LOST_BW_DUE_TO_FE_IBFULL,
+ IDEAL_BE_LOST_BW_DUE_TO_FE_IMISS,
+ IDEAL_BE_LOST_BW_DUE_TO_FE_PLP,
+ IDEAL_BE_LOST_BW_DUE_TO_FE_TLBMISS,
+ IDEAL_BE_LOST_BW_DUE_TO_FE_UNREACHED,
+ INST_CHKA_LDC_ALAT_ALL,
+ INST_CHKA_LDC_ALAT_FP,
+ INST_CHKA_LDC_ALAT_INT,
+ INST_DISPERSED,
+ INST_FAILED_CHKA_LDC_ALAT_ALL,
+ INST_FAILED_CHKA_LDC_ALAT_FP,
+ INST_FAILED_CHKA_LDC_ALAT_INT,
+ INST_FAILED_CHKS_RETIRED_ALL,
+ INST_FAILED_CHKS_RETIRED_FP,
+ INST_FAILED_CHKS_RETIRED_INT,
+ ISB_BUNPAIRS_IN,
+ ITLB_MISSES_FETCH_ALL,
+ ITLB_MISSES_FETCH_L1ITLB,
+ ITLB_MISSES_FETCH_L2ITLB,
+ L1DTLB_TRANSFER,
+ L1D_READS_SET0,
+ L1D_READS_SET1,
+ L1D_READ_MISSES_ALL,
+ L1D_READ_MISSES_RSE_FILL,
+ L1ITLB_INSERTS_HPW,
+ L1I_EAR_EVENTS,
+ L1I_FETCH_ISB_HIT,
+ L1I_FETCH_RAB_HIT,
+ L1I_FILLS,
+ L1I_PREFETCHES,
+ L1I_PREFETCH_STALL_ALL,
+ L1I_PREFETCH_STALL_FLOW,
+ L1I_PURGE,
+ L1I_PVAB_OVERFLOW,
+ L1I_RAB_ALMOST_FULL,
+ L1I_RAB_FULL,
+ L1I_READS,
+ L1I_SNOOP,
+ L1I_STRM_PREFETCHES,
+ L2DTLB_MISSES,
+ L2_BAD_LINES_SELECTED_ANY,
+ L2_BYPASS_L2_DATA1,
+ L2_BYPASS_L2_DATA2,
+ L2_BYPASS_L2_INST1,
+ L2_BYPASS_L2_INST2,
+ L2_BYPASS_L3_DATA1,
+ L2_BYPASS_L3_INST1,
+ L2_DATA_REFERENCES_L2_ALL,
+ L2_DATA_REFERENCES_L2_DATA_READS,
+ L2_DATA_REFERENCES_L2_DATA_WRITES,
+ L2_FILLB_FULL_THIS,
+ L2_FORCE_RECIRC_ANY,
+ L2_FORCE_RECIRC_FILL_HIT,
+ L2_FORCE_RECIRC_FRC_RECIRC,
+ L2_FORCE_RECIRC_IPF_MISS,
+ L2_FORCE_RECIRC_L1W,
+ L2_FORCE_RECIRC_OZQ_MISS,
+ L2_FORCE_RECIRC_SAME_INDEX,
+ L2_FORCE_RECIRC_SMC_HIT,
+ L2_FORCE_RECIRC_SNP_OR_L3,
+ L2_FORCE_RECIRC_TAG_NOTOK,
+ L2_FORCE_RECIRC_TRAN_PREF,
+ L2_FORCE_RECIRC_VIC_BUF_FULL,
+ L2_FORCE_RECIRC_VIC_PEND,
+ L2_GOT_RECIRC_IFETCH_ANY,
+ L2_GOT_RECIRC_OZQ_ACC,
+ L2_IFET_CANCELS_ANY,
+ L2_IFET_CANCELS_BYPASS,
+ L2_IFET_CANCELS_CHG_PRIO,
+ L2_IFET_CANCELS_DATA_RD,
+ L2_IFET_CANCELS_DIDNT_RECIR,
+ L2_IFET_CANCELS_IFETCH_BYP,
+ L2_IFET_CANCELS_PREEMPT,
+ L2_IFET_CANCELS_RECIR_OVER_SUB,
+ L2_IFET_CANCELS_ST_FILL_WB,
+ L2_INST_DEMAND_READS,
+ L2_INST_PREFETCHES,
+ L2_ISSUED_RECIRC_IFETCH_ANY,
+ L2_ISSUED_RECIRC_OZQ_ACC,
+ L2_L3ACCESS_CANCEL_ANY,
+ L2_L3ACCESS_CANCEL_DFETCH,
+ L2_L3ACCESS_CANCEL_EBL_REJECT,
+ L2_L3ACCESS_CANCEL_FILLD_FULL,
+ L2_L3ACCESS_CANCEL_IFETCH,
+ L2_L3ACCESS_CANCEL_INV_L3_BYP,
+ L2_L3ACCESS_CANCEL_SPEC_L3_BYP,
+ L2_L3ACCESS_CANCEL_UC_BLOCKED,
+ L2_MISSES,
+ L2_OPS_ISSUED_FP_LOAD,
+ L2_OPS_ISSUED_INT_LOAD,
+ L2_OPS_ISSUED_NST_NLD,
+ L2_OPS_ISSUED_RMW,
+ L2_OPS_ISSUED_STORE,
+ L2_OZDB_FULL_THIS,
+ L2_OZQ_ACQUIRE,
+ L2_OZQ_CANCELS0_ANY,
+ L2_OZQ_CANCELS0_LATE_ACQUIRE,
+ L2_OZQ_CANCELS0_LATE_BYP_EFFRELEASE,
+ L2_OZQ_CANCELS0_LATE_RELEASE,
+ L2_OZQ_CANCELS0_LATE_SPEC_BYP,
+ L2_OZQ_CANCELS1_BANK_CONF,
+ L2_OZQ_CANCELS1_CANC_L2M_ST,
+ L2_OZQ_CANCELS1_CCV,
+ L2_OZQ_CANCELS1_ECC,
+ L2_OZQ_CANCELS1_HPW_IFETCH_CONF,
+ L2_OZQ_CANCELS1_L1DF_L2M,
+ L2_OZQ_CANCELS1_L1_FILL_CONF,
+ L2_OZQ_CANCELS1_L2A_ST_MAT,
+ L2_OZQ_CANCELS1_L2D_ST_MAT,
+ L2_OZQ_CANCELS1_L2M_ST_MAT,
+ L2_OZQ_CANCELS1_MFA,
+ L2_OZQ_CANCELS1_REL,
+ L2_OZQ_CANCELS1_SEM,
+ L2_OZQ_CANCELS1_ST_FILL_CONF,
+ L2_OZQ_CANCELS1_SYNC,
+ L2_OZQ_CANCELS2_ACQ,
+ L2_OZQ_CANCELS2_CANC_L2C_ST,
+ L2_OZQ_CANCELS2_CANC_L2D_ST,
+ L2_OZQ_CANCELS2_DIDNT_RECIRC,
+ L2_OZQ_CANCELS2_D_IFET,
+ L2_OZQ_CANCELS2_L2C_ST_MAT,
+ L2_OZQ_CANCELS2_L2FILL_ST_CONF,
+ L2_OZQ_CANCELS2_OVER_SUB,
+ L2_OZQ_CANCELS2_OZ_DATA_CONF,
+ L2_OZQ_CANCELS2_READ_WB_CONF,
+ L2_OZQ_CANCELS2_RECIRC_OVER_SUB,
+ L2_OZQ_CANCELS2_SCRUB,
+ L2_OZQ_CANCELS2_WEIRD,
+ L2_OZQ_FULL_THIS,
+ L2_OZQ_RELEASE,
+ L2_REFERENCES,
+ L2_STORE_HIT_SHARED_ANY,
+ L2_SYNTH_PROBE,
+ L2_VICTIMB_FULL_THIS,
+ L3_LINES_REPLACED,
+ L3_MISSES,
+ L3_READS_ALL_ALL,
+ L3_READS_ALL_HIT,
+ L3_READS_ALL_MISS,
+ L3_READS_DATA_READ_ALL,
+ L3_READS_DATA_READ_HIT,
+ L3_READS_DATA_READ_MISS,
+ L3_READS_DINST_FETCH_ALL,
+ L3_READS_DINST_FETCH_HIT,
+ L3_READS_DINST_FETCH_MISS,
+ L3_READS_INST_FETCH_ALL,
+ L3_READS_INST_FETCH_HIT,
+ L3_READS_INST_FETCH_MISS,
+ L3_REFERENCES,
+ L3_WRITES_ALL_ALL,
+ L3_WRITES_ALL_HIT,
+ L3_WRITES_ALL_MISS,
+ L3_WRITES_DATA_WRITE_ALL,
+ L3_WRITES_DATA_WRITE_HIT,
+ L3_WRITES_DATA_WRITE_MISS,
+ L3_WRITES_L2_WB_ALL,
+ L3_WRITES_L2_WB_HIT,
+ L3_WRITES_L2_WB_MISS,
+ LOADS_RETIRED,
+ MEM_READ_CURRENT_ANY,
+ MEM_READ_CURRENT_IO,
+ MISALIGNED_LOADS_RETIRED,
+ MISALIGNED_STORES_RETIRED,
+ NOPS_RETIRED,
+ PREDICATE_SQUASHED_RETIRED,
+ RSE_CURRENT_REGS_2_TO_0,
+ RSE_CURRENT_REGS_5_TO_3,
+ RSE_CURRENT_REGS_6,
+ RSE_DIRTY_REGS_2_TO_0,
+ RSE_DIRTY_REGS_5_TO_3,
+ RSE_DIRTY_REGS_6,
+ RSE_EVENT_RETIRED,
+ RSE_REFERENCES_RETIRED_ALL,
+ RSE_REFERENCES_RETIRED_LOAD,
+ RSE_REFERENCES_RETIRED_STORE,
+ SERIALIZATION_EVENTS,
+ STORES_RETIRED,
+ SYLL_NOT_DISPERSED_ALL,
+ SYLL_NOT_DISPERSED_EXPL,
+ SYLL_NOT_DISPERSED_FE,
+ SYLL_NOT_DISPERSED_IMPL,
+ SYLL_NOT_DISPERSED_MLI,
+ SYLL_OVERCOUNT_ALL,
+ SYLL_OVERCOUNT_EXPL,
+ SYLL_OVERCOUNT_IMPL,
+ UC_LOADS_RETIRED,
+ UC_STORES_RETIRED,
+
+ IA64_MONITOR_LAST
+ };
+
+ // Accessors_
+ const char *getMonitorString( IA64_MONITOR monitor );
+};
+
+#endif
\ No newline at end of file
Added: branches/itanium2/histx/MmTimer.h
==============================================================================
--- (empty file)
+++ branches/itanium2/histx/MmTimer.h Fri Sep 9 17:55:08 2005
@@ -0,0 +1,34 @@
+
+
+#ifndef Manta_Histx_MMTIMER__H
+#define Manta_Histx_MMTIMER__H
+
+#include <SCIRun/Core/Thread/Time.h>
+#include <histx/Counter.h>
+
+namespace Histx_Manta {
+
+ // This class is a wrapper for mmtimer which implements the Counter
interface.
+ class MmTimer : public Counter {
+ protected:
+ typedef SCIRun::Time MMTimer;
+ typedef MMTimer::SysClock TickType;
+
+ // Begin and end ticks.
+ TickType begin_tick;
+ TickType end_tick;
+
+ public:
+ // Constructor.
+ MmTimer() { }
+
+ void begin() { begin_tick = MMTimer::currentTicks(); };
+ void end() { end_tick = MMTimer::currentTicks(); };
+ double eval() {
+ return (double)(end_tick - begin_tick) *
MMTimer::ticksPerSecond();
+ };
+
+ };
+};
+
+#endif
\ No newline at end of file
Added: branches/itanium2/histx/SingleSamplerCounter.cc
==============================================================================
--- (empty file)
+++ branches/itanium2/histx/SingleSamplerCounter.cc Fri Sep 9 17:55:08
2005
@@ -0,0 +1,104 @@
+
+#include <histx/SingleSamplerCounter.h>
+#include <Interface/Context.h>
+#include <Interface/Fragment.h>
+#include <Interface/RayPacket.h>
+#include <Interface/Renderer.h>
+
+#include <histx/DerivedMonitor.h>
+#include <histx/MmTimer.h>
+
+#include <ezpm.h>
+
+using namespace Histx_Manta;
+using namespace Manta;
+
+void SingleSamplerCounter::setupBegin(const SetupContext& context, int
numChannels)
+{
+ channelInfo.resize(numChannels);
+ context.renderer->setupBegin(context, numChannels);
+}
+
+void SingleSamplerCounter::setupDisplayChannel(SetupContext& context)
+{
+ ChannelInfo& ci = channelInfo[context.channelIndex];
+ bool stereo;
+ int xres, yres;
+ context.getResolution(stereo, xres, yres);
+
+ // Set up the scale from -1 to 1
+ ci.xscale = 2./xres;
+ ci.yscale = ci.xscale;
+ ci.xoffset = (-xres/2.+0.5)*ci.xscale; // Offset to pixel center
+ ci.yoffset = (-yres/2.+0.5)*ci.yscale;
+ context.renderer->setupDisplayChannel(context);
+}
+
+void SingleSamplerCounter::setupFrame(const RenderContext& context)
+{
+ context.renderer->setupFrame(context);
+}
+
+void SingleSamplerCounter::renderFragment(const RenderContext& context,
Fragment& fragment)
+{
+ ChannelInfo& ci = channelInfo[context.channelIndex];
+ int flags = RayPacket::HaveImageCoordinates;
+ if(fragment.getFlags() & Fragment::ConstantEye)
+ flags |= RayPacket::ConstantEye;
+
+ MmTimer counter;
+ // CpuCycles counter;
+ // CpuCplChanges counter;
+ // L1IMissRatio counter;
+ // InstructionsPerCycle counter;
+
+ for(int f=0;f<fragment.getSize();f+=RayPacket::MaxSize){
+
+ counter.begin();
+
+ // We want to fill our RayPacket with as many as
+ // RayPacket::MaxSize rays.
+ int size = RayPacket::MaxSize;
+ if(size >= fragment.getSize()-f)
+ // We don't have enough fragments left to fill a ray packet, so
+ // set the size of the RayPacket to the number of fragments we
+ // have left.
+ size = fragment.getSize()-f;
+ // Create a ray packet
+ int depth = 0;
+ RayPacketData raydata;
+ RayPacket rays(raydata, size, depth, flags);
+
+ if(fragment.getFlags() & Fragment::ConsecutiveX){
+ Fragment::Element& fe0 = fragment.get(f);
+ double px = fe0.x*ci.xscale+ci.xoffset;
+ double py = fe0.y*ci.yscale+ci.yoffset;
+ for(int i=0;i<size;i++){
+ Fragment::Element& fe = fragment.get(f+i);
+ rays.setPixel(i, 0, px, py, &fe.color);
+ px += ci.xscale;
+ }
+ } else {
+ for(int i=0;i<size;i++){
+ Fragment::Element& fe = fragment.get(f+i);
+ double px = fe.x*ci.xscale+ci.xoffset;
+ double py = fe.y*ci.yscale+ci.yoffset;
+ rays.setPixel(i, 1, px, py, &fe.color);
+ }
+ }
+
+ // Trace the rays. The results will automatically go into the fragment
+ context.renderer->traceEyeRays(context, rays);
+
+ counter.end();
+
+ double measure = counter.eval();
+ Color color(RGB(measure,measure,measure));
+
+ // Apply the same color to the entire fragment.
+ for (int i=0;i<size;++i) {
+ *(rays.get(i).color) = color;
+ };
+ }
+
+}
Added: branches/itanium2/histx/SingleSamplerCounter.h
==============================================================================
--- (empty file)
+++ branches/itanium2/histx/SingleSamplerCounter.h Fri Sep 9 17:55:08
2005
@@ -0,0 +1,33 @@
+
+#ifndef Manta_Histx_SINGLESAMPLERCOUNTER__H
+#define Manta_Histx_SINGLESAMPLERCOUNTER__H
+
+#include <Interface/PixelSampler.h>
+#include <sgi_stl_warnings_off.h>
+#include <string>
+#include <vector>
+#include <sgi_stl_warnings_on.h>
+
+namespace Histx_Manta {
+ using namespace std;
+ using namespace Manta;
+ class SingleSamplerCounter : public PixelSampler {
+ private:
+ struct ChannelInfo {
+ double xscale;
+ double xoffset;
+ double yscale;
+ double yoffset;
+ };
+ vector<ChannelInfo> channelInfo;
+
+ public:
+ virtual ~SingleSamplerCounter() { };
+ virtual void setupBegin(const SetupContext&, int numChannels);
+ virtual void setupDisplayChannel(SetupContext&);
+ virtual void setupFrame(const RenderContext& context);
+ virtual void renderFragment(const RenderContext& context, Fragment&
fragment);
+ };
+}
+
+#endif
- [MANTA] r537 - branches/itanium2/histx, abe, 09/09/2005
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